Synchronous logic circuits are widely known and used in computer systems. Notwithstanding, the limitations of such synchronous logic circuits are increasingly recognized as the operating speed of devices is stepped up and as there develops a demand for further improvement in performance so as to implement a plan for developing high-speed systems. One of the problems is that it becomes difficult to decrease the ratio of the clock skew to the clock cycle time below a certain level as the clock frequency increases so it is difficult to improve the performance of computer systems implementing such circuits. Also, in order to decrease the power consumption of the system, CMOS (Complementary MOS) has widely been employed because the power is consumed only when the circuit is switched. The greatest benefit of using a CMOS circuit will not be realized, however, since the signal transition frequency increases in the circuit of the system as the clock frequency increases.
Consequently, expectations have been focused on designing an asynchronous logic circuit that is switched when required logically without the need for a clock signal. Although there are various designs of asynchronous logic circuits, a two-line, two-phase system has been considered relatively easy to design. The two-line, two-phase system is designed such that one-bit data D is expressed by the two-line signals (d+, d-), wherein the invalid state (no valid data present) is expressed when (d+, d-) is (0, 0); "0" is produced by the transition from (0, 0) to (0, 1); and "1" is produced by the transition from (0, 0) to (1, 0). The state (1, 1) is not employed in this case. As an example, a two-line, two-phase asynchronous processor is disclosed in "Information Processing, vol. 34, No. 1, pp. 72-80, issued in January, 1993."
FIG. 12(a) shows an ordinary logic circuit, whereas FIG. 12(b) shows a logic circuit in which a two-line, two-phase system is employed as a substitute. The replacement of the logic circuit shown in FIG. 12(a) with the one shown in FIG. 12(b) requires comparing and contrasting an ordinary unit gate circuit with a corresponding two-line, two-phase unit gate circuit one by one before replacing the logic gate circuit on a unit basis. Ordinary, conventional unit gate circuits and the corresponding two-line, two-phase unit gate circuits that are substituted therefor are shown in FIG. 13. In the case of a relatively simple logic circuit such as that shown in FIG. 12(a), it is not so much trouble to replace the logic circuit. However, a complicated logical combination is normally required in practical circuit-designing. Consequently, ordinary synchronous logic is often used to design a circuit and then two-line, two-phase logic based on the aforementioned asynchronous logic substitutions is used as a substitute. Thus, it takes twice the time to design circuits because of the increased number of steps taken to make the substitutions. This constitutes a disadvantage to implementing asynchronous logic such as a two-line, two-phase system in practical applications.